Digital computer with cache capable of concurrently handling multiple accesses from parallel processors

Patent · Tue Dec 27 04:00:00 EST 1988

OSTI ID:6215152

Ziegler, M L; Blau, J S; Fredieu, R L

A digital processing system is described comprising: a main memory for storing information at memory locations identified by memory addresses, a cache memory for temporarily storing copies of information from selected memory addresses, first communication means for transferring information between the cache and main memories, processors for processing information stored in the cache memory, second communication means for transferring stored information between the cache memory and the processors, the processors each including means for making accesses to information stored in the cache memory by transferring the address of the information across the second communication means to the cache memory, the cache memory comprising data storage means for storing the copies of information, address storage means such as a tag store for storing the memory addresses associated with the copies, memory interface mans for accessing the main memory across the first communication means to transfer information between the data storage means and the main memory, means for accepting and storing the address for a current access and at least one earlier accepted but not yet completed access (''pending access'').

• Assignee: Alliant Computer Systems Corp., Littleton, MA
• Patent Number(s): US 4794521
• OSTI ID: 6215152
• Country of Publication: United States
• Language: English

Related Subjects

99 GENERAL AND MISCELLANEOUS
990210* -- Supercomputers-- (1987-1989)
ARRAY PROCESSORS
COMPUTER ARCHITECTURE
COMPUTERS
DIGITAL COMPUTERS
MEMORY DEVICES
MEMORY MANAGEMENT
PARALLEL PROCESSING
PROGRAMMING
SUPERCOMPUTERS