Design and performance of a low-noise, low-power consumption CMOS charge amplifier for capacitive detectors
- LEPSI, Strasbourg (France)
- CEA, Gif-sur-Yvette (France)
In order to achieve the readout of silicon detectors required for high rate applications in particle physics, nuclear physics, and X-{beta} imaging, charge amplifiers are widely used to sense the charges collected on the detector plate and to convert the charge signal to the voltage signal. In this paper, a new design of low noise, low-power consumption charge amplifier is described. Theoretical results show that a total output noise voltage reduction of 0.264 mV has been obtained. This value corresponds to a 46% reduction compared to the noise performance of a conventional charge amplifier. A complete readout system including the proposed charge amplifier has been realized in a 0.8-{micro}m semiconductor on insulator (SOI) bipolar complementary metal-oxide-semiconductor (BiCMOS) process. A measured noise performance of 450 electrons at 0 pF with a slope of 44 electrons/pF for a shaping time of 45 ns, a conversion gain of 20 mV/fC and 1-mW power consumption have been obtained.
- OSTI ID:
- 616153
- Journal Information:
- IEEE Transactions on Nuclear Science, Journal Name: IEEE Transactions on Nuclear Science Journal Issue: 1 Vol. 45; ISSN 0018-9499; ISSN IETNAE
- Country of Publication:
- United States
- Language:
- English
Similar Records
A fast, low power CMOS amplifier on SOI for sensor applications in a radiation environment of up to 20 Mrad(Si)
A BiCMOS front-end system with binary delay line for capacitive detector read-out