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Routing algorithms in the physical design of VLSI circuits

Thesis/Dissertation ·
OSTI ID:6103949
In this thesis, the author solves several important routing problems in the physical design of VLSI circuits. He successfully applies combinatorial optimization techniques to these problems and obtains very effective and efficient algorithms. The experimental results presented in this thesis show that these algorithms produce high quality routing solutions on a wide range of test circuits using reasonable amount of computation time. Chapter 2 and 3 addresses some global routing problems in the physical design of VLSI circuits. In Chapter 2, he presents a global routing algorithm for standard cell design which connects all the nets in parallel. He shows that only a linear number of possible connections need to be considered by his algorithm. In Chapter 3, he presents an algorithm which combines the pin assignment step and the global routing step in the general cell design style. The complexity of the combined problem is reduced based on the block boundary decomposition. In Chapter 4 and 5, he studies some detailed routing problems. In Chapter 4, he shows how to enhance channel compaction results by modifying the initial grid-based routing solution. He shows that proper track permutation and local re-routing leads to significant reduction in channel routing area. In Chapter 5, he studies a new channel routing model called over-the-cell channel routing. He shows that the over-the-cell routing problem can be solved in three steps and presents efficient solutions to the sub-problems at each step. In Chapter 6, he studies the planar subset problem and the topological via minimization in multi-layer routing models. He shows that the general problems are NP-hard and gives efficient solutions to the restricted problems.
Research Organization:
Illinois Univ., Urbana, IL (United States)
OSTI ID:
6103949
Country of Publication:
United States
Language:
English