A low power low noise amplifier for a 128 channel detector read-out chip

Conference · Wed Feb 01 00:00:00 EST 1989 · IEEE Trans. Nucl. Sci.; (United States)

OSTI ID:6080420

Stanton, J C

This paper describes the design of a low power, low noise CMOS amplifier. The amplifier was designed using the folded cascade configuration and was implemented on a 3 ..mu..m double polysilicon process. The amplifier is part of a 128 channel charge amplifier array chip for use in the read-out of radiation detectors with many channels. Aspects of the amplifier design such as bandwidth, pulse response, and noise are discussed and the effects of individual transistors are shown thereby relating circuit performance to process parameters; circuit test results are presented and radiation test results are included.

• Research Organization: Rutherford Appleton Lab., Chilton, Oxon, OX11 OQX (GB)
• OSTI ID: 6080420
• Report Number(s): CONF-881103-
• Journal Information: IEEE Trans. Nucl. Sci.; (United States), Vol. 36:1; Conference: IEEE nuclear science symposium, Orlando, FL, USA, 9 Nov 1988
• Country of Publication: United States
• Language: English

Related Subjects

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY
42 ENGINEERING
MOS TRANSISTORS
PULSE AMPLIFIERS
DESIGN
RADIATION DETECTORS
MEMORY DEVICES
INTEGRATED CIRCUITS
NOISE
PERFORMANCE TESTING
SI SEMICONDUCTOR DETECTORS
AMPLIFIERS
ELECTRONIC CIRCUITS
ELECTRONIC EQUIPMENT
EQUIPMENT
MEASURING INSTRUMENTS
MICROELECTRONIC CIRCUITS
SEMICONDUCTOR DETECTORS
SEMICONDUCTOR DEVICES
TESTING
TRANSISTORS
440101* - Radiation Instrumentation- General Detectors or Monitors & Radiometric Instruments
420800 - Engineering- Electronic Circuits & Devices- (-1989)