Routing and embedding problems in VLSI and parallel networks
Thesis/Dissertation
·
OSTI ID:6061323
Specialized parallel machines have been designed and built for specific tasks. Traditionally, pyramid machines have been used for image processing problems. The author examines here techniques for extending the use of pyramid networks. By mapping a common data structure and computation graph, the binary tree, onto the pyramid structure, he shows that pyramid machines may handle also recursive tasks. He gives algorithms for placing the complete binary tree, the X-tree, and, by composition, arbitrary binary trees onto pyramids. He looks at the issue of mapping a structure which contains a large number of processes to a machine which contains a smaller number of processors. He compresses pyramids into arbitrarily small pyramids. Then, by detailed placement and composition, he shows how to map X-trees, complete binary trees and arbitrary binary trees onto smaller pyramids. One class of these problems, known as the Single Row Routing problem, involves routing wires on one or more layers when the pins are laid out along a straight line. To prevent electrical interference, the wires are laid out in tracks parallel to the row of pins and distinct wires are prohibited from crossing. Formally, the Single Row Routing problem involves determining the feasibility of any wiring in the minimum number of tracks. He dramatically cuts the search space of an exhaustive search so that larger instances of the problem may be solved in a reasonable amount of time. When he is allowed to route wires on more than one layer the problem of determining the feasibility of a wiring in a minimum number of layers but with an arbitrary number of parallel tracks is also known to be NP-complete. A long-standing open problem has been the complexity of the Single Row Routing problem on multilayers when the number of parallel tracks per layer is fixed. He shows that this version of the problem is also NP-complete.
- Research Organization:
- Texas Univ., Dallas, TX (United States)
- OSTI ID:
- 6061323
- Country of Publication:
- United States
- Language:
- English
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Related Subjects
42 ENGINEERING
426000* -- Engineering-- Components
Electron Devices & Circuits-- (1990-)
99 GENERAL AND MISCELLANEOUS
990200 -- Mathematics & Computers
DATA PROCESSING
ELECTRONIC CIRCUITS
IMAGE PROCESSING
MAPPING
MICROELECTRONIC CIRCUITS
PARALLEL PROCESSING
PROCESSING
PROGRAMMING
ROUTING
TASK SCHEDULING
426000* -- Engineering-- Components
Electron Devices & Circuits-- (1990-)
99 GENERAL AND MISCELLANEOUS
990200 -- Mathematics & Computers
DATA PROCESSING
ELECTRONIC CIRCUITS
IMAGE PROCESSING
MAPPING
MICROELECTRONIC CIRCUITS
PARALLEL PROCESSING
PROCESSING
PROGRAMMING
ROUTING
TASK SCHEDULING