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U.S. Department of Energy
Office of Scientific and Technical Information

Measurement of internal capacitances of integrated circuits

Conference ·
OSTI ID:6017945

Direct probe measurements have been made of intra-transistor and interconnection capacitances in integrated circuit CMOS technologies down to 2 ..mu..m detail. Resolution of measurements have been confirmed to 1 femtofarad. These differential capacitance measurements are taken at 1 MHz, comparable to the normal frequency range of circuit operation. These measurements are performed directly on structures normally occurring on integrated circuit wafers, not on special enhanced capacitive test keys or using custon on-chip amplifiers. The method used the HP-4062B semiconductor parameter extractor. Elaborate shielding and ac-guarding of adjacent microfeatures were necessary to measure only the capacitances of interest. Extensive signal averaging and system capacitance canceling was performed. Although elaborate and detailed, the method developed can be used by any semiconductor production facility on their standard test structures. The voltage dependence of the junction capacitances of the drain to p-well and the gate to p-well were found consistent with calculation down to 2 ..mu..m dimensions. The gate to drain overlap capacitance was also examined allowing an estimate of the fringing contribution. 9 refs., 14 figs.

Research Organization:
Sandia National Labs., Albuquerque, NM (USA); New Mexico Univ., Albuquerque (USA)
DOE Contract Number:
AC04-76DP00789
OSTI ID:
6017945
Report Number(s):
SAND-85-2420C; CONF-860566-1; ON: DE86006494
Country of Publication:
United States
Language:
English

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