Block, multistride vector, and FFT access in parallel memory systems

Journal Article · Tue Jan 01 00:00:00 EST 1991 · IEEE Transactions on Parallel and Distributed Systems (Institute of Electrical and Electronics Engineers); (United States)

DOI:https://doi.org/10.1109/71.80188· OSTI ID:5987282

Harper, III, D T ^[1]

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1. Dept. of Electrical Engineering, Univ. of Texas at Dallas, Richardson, TX (US)

This paper discusses the use of dynamic storage schemes to improve parallel memory performance during three important classes of data accesses: vector accesses in which multiple strides are used to access a single vector, block accesses, and constant-geometry FFT accesses. The schemes investigated in this paper are based on linear address transformations, also known as XOR schemes. It has been shown that this class of schemes can be implemented more efficiently in hardware and has more flexibility than schemes based on row rotations or other techniques. Several analytical results are shown. These include: quantitative analysis of buffering effects in pipelined memory systems; design rules for storage schemes that provide conflict-free access using multiple strides, blocks, and FFT access patterns; and an analysis of the effects of memory bank cycle time on storage scheme capabilities.

• OSTI ID: 5987282
• Journal Information: IEEE Transactions on Parallel and Distributed Systems (Institute of Electrical and Electronics Engineers); (United States), Vol. 2:1; ISSN 1045-9219
• Country of Publication: United States
• Language: English

Related Subjects

99 GENERAL AND MISCELLANEOUS//MATHEMATICS, COMPUTING, AND INFORMATION SCIENCE
PARALLEL PROCESSING
COMPUTER ARCHITECTURE
MEMORY MANAGEMENT
DESIGN
FOURIER TRANSFORMATION
PERFORMANCE TESTING
VECTOR PROCESSING
INTEGRAL TRANSFORMATIONS
PROGRAMMING
TESTING
TRANSFORMATIONS
990200* - Mathematics & Computers