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Low-loss lumped-element capacitors for superconductive integrated circuits

Conference · · IEEE Trans. Magn.; (United States)
OSTI ID:5920074

Low-loss lumped-element capacitors for superconductive circuits were fabricated using sputter-deposited Nb electrodes. The dielectric layer was formed by partially anodizing the Nb base electrode. The deposition technique for the counterelectrode strongly affected the parasitic shunt conductance of the capacitors. It was found that this conductance could be reduced by depositing the Nb counterelectrode films by dc magnetron sputtering at a low rate and at a high Ar pressure. By optimizing these process parameters, capacitors with breakdown voltages greater than 85% of the anodic oxide formation voltage and loss-tangents less than 0.003 at 10 MHz were fabricated. These capacitors were integrated with Nb thin-film inductors to produce L-C resonators with quality factors greater than 400.

Research Organization:
Lincoln Lab., MIT, Lexington, MA (US)
OSTI ID:
5920074
Report Number(s):
CONF-880812-
Journal Information:
IEEE Trans. Magn.; (United States), Journal Name: IEEE Trans. Magn.; (United States) Vol. 25:2; ISSN IEMGA
Country of Publication:
United States
Language:
English