Drawing processor for computer graphic system using a plurality of parallel processors which each handle a group of display screen scanlines
This patent describes an image memory unit having a serial and parallel data processing architecture in an apparatus for generating and storing pixel representation for the display of graphic data in a two-dimensional pixel plane defined by contiguous, parallel display scanlines, each of which includes contiguous pixels. The apparatus has means for providing instructions in the form of a first sequence of commands which define representations of the graphic data in a coordinate plane and an image memory unit block for receiving the commands and for controlling a random access image memory into which pixel display data is written, wherein the scanlines are associated into N sets, where N is at least one. The image memory unit block having at least one image memory unit.
- Assignee:
- lliant Computer System Corp., Littleton, MA (USA)
- Patent Number(s):
- A; US 4967392
- Application Number:
- PPN: US 7-225-113
- OSTI ID:
- 5903393
- Country of Publication:
- United States
- Language:
- English
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