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Low power photomultiplier base circuit

Conference · · IEEE Trans. Nucl. Sci.; (United States)
OSTI ID:5898307

Low power photomultiplier base circuits, using high voltage FETs in the voltage divider, are described. Two examples of design are presented. One consists of P channel FETs for all stages of dynode and features extremely low stationary current (20 ..mu..A). The other consists of N channel FETs for the last 3 or 4 dynodes and the stationary current is about 130 ..mu..A. They ensure good linearity at high counting rates (up to the average anode current of 100 ..mu..A).

Research Organization:
Saitama Univ., Saitama
OSTI ID:
5898307
Report Number(s):
CONF-841007-
Journal Information:
IEEE Trans. Nucl. Sci.; (United States), Journal Name: IEEE Trans. Nucl. Sci.; (United States) Vol. NS-32:1; ISSN IETNA
Country of Publication:
United States
Language:
English