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1/f noise in n- and p-channel MOS devices through irradiation and annealing

Conference · · IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers); (United States)
DOI:https://doi.org/10.1109/23.124108· OSTI ID:5832501
; ;  [1];  [2]
  1. Sandia National Labs., Albuquerque, NM (United States)
  2. L and M Technologies, Albuquerque, NM (US)

In this paper the authors investigate the 1/f noise of n- and p-channel MOS transistors through irradiation and biased anneals. While the increase in noise during irradiation is similar for both types of devices, the noise differs significantly in response to biased anneals. In particular, the noise decreases with decreasing {Delta}V{sub ot} during positive-bias anneals in nMOS transistor but increases during positive-bias anneals for pMOS transistors. Conversely, negative bias anneals increase the noise in nMOS devices but decrease the noise in pMOS devices. These results are explained in terms of majority carrier trapping and de- trapping at oxide defects near the Si/SiO{sub 2} interface. Under normal operating bias conditions (positive bias for nMOS and negative bias for pMOS), the 1/f noise of both n- and p-channel transistors decreases through post-irradiation annealing.

DOE Contract Number:
AC04-76DP00789
OSTI ID:
5832501
Report Number(s):
CONF-910751--
Journal Information:
IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers); (United States), Journal Name: IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers); (United States) Vol. 38:6; ISSN 0018-9499; ISSN IETNA
Country of Publication:
United States
Language:
English

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