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A profit maximization approach to VLSI fabrication scheduling

Thesis/Dissertation ·
OSTI ID:5827619
One of the main objectives of any IC manufacturer is to utilize optimally all the available resources in order to maximize the total profit. Increasing the throughput alone would probably be sufficient to increase the revenue over a period of time if the yield were high and fairly stable. However, this is not the case with VLSI manufacturing. A number of factors affect the manufacturing process: manufacturing line resources are subject to scheduled and unscheduled downtimes; quality control decisions that are made after each important fabrication step may necessitate a change in the manufacturing schedule. The author's research deals with scheduling at the lot level - assignment of jobs to machines and sequencing of jobs. Decisions at this level are usually short term in nature and the schedule has to be updated periodically in order to account for one or more of the factors mentioned above. The author has developed the constrained enumeration approach that provides the IC manufacturer the capability to reschedule quickly and inexpensively. The total set of fabrication steps is divided into groups based on demand dates and the optimal group order is determined by constrained implicit group enumeration.
Research Organization:
Carnegie-Mellon Univ., Pittsburgh, PA (USA)
OSTI ID:
5827619
Country of Publication:
United States
Language:
English

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