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Shop-floor scheduling of semiconductor-wafer manufacturing

Thesis/Dissertation ·
OSTI ID:5612043
Semiconductor wafer fabrication is perhaps the most complex manufacturing process found today, with a wide range of complex issues related to production planning and scheduling. Computer-integrated manufacturing (CIM) systems make is possible, in theory, to use global factory state information for factory control decisions. The possibility of making decisions on an expanded information set raises two of the research questions treated in this dissertation: How should global information be summarized and used for decisions and how much improvement can one expect as a result, compared with decisions based on local information This research investigates lot release control and dispatching policies for shop-level scheduling of a semiconductor fab. The author introduces a closed-loop scheduling policy, called Starvation Avoidance, that makes use of global factory state information and that in simulation experiments compares favorably to traditional scheduling policies (that use local and global information) with respect to the tradeoff between throughput and queueing time. The virtual inventory of the bottleneck resource is defined to be the work content at the bottleneck of all jobs either at the bottleneck station or expected to arrive at the bottleneck within a given lead time.
Research Organization:
California Univ., Berkeley, CA (USA)
OSTI ID:
5612043
Country of Publication:
United States
Language:
English