500 picosecond TDC for DIRC at BABAR

Conference · Wed Dec 31 04:00:00 EST 1997

OSTI ID:577683

Lebbolo, H; Bailly, P; Chauveau, J ^[1]

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1. LPNHE, Paris (France); and others

A 16 channel TDC chip has been developed at LPNHE Paris, to equip the Front-End electronics of the Detector of Internally Reflected Cerenkov light (DIRC) of the BABAR experiment at the SLAC B factory (Stanford, USA). Binning is 500 picosecond, conversion time is 32 ns, with a fall range of 32 {mu}s. The chip integrates channel buffering and selective readout of data falling within a programmable window defined by the level one trigger latency and resolution. The selective readout allows to manage random inputs at a maximum average rate of 100 kHz on each channel and makes data available at any time a trigger occurs. The maximum average rate of L1 accept trigger will be 2 kHz. The chip, housed in a 68 pin PLCC package, is designed in 0.7 {mu}m CMOS technology and manufactured by ATMEL ES2. The TDC section and channel FIFOs are full custom designs. The TDC uses 16 independent voltage controlled digital delay lines and a 17th calibration channel which allows to tune the delays on the 59.5 MHZ reference clock. The selective readout algorithm has been synthesized from Verilog description and uses ATMEL ES2 standard cells. Die size is 36 mm2 and power less than 100 mW with all inputs fired at 100 kHZ. Prototypes test results show performances better than the specifications for the chip to be used on the DIRC detector. The ten production prototypes have been delivered mid May 1997.

• OSTI ID: 577683
• Report Number(s): CONF-970565--
• Country of Publication: United States
• Language: English

Related Subjects

42 ENGINEERING
43 PARTICLE ACCELERATORS
44 INSTRUMENTATION
INCLUDING NUCLEAR AND PARTICLE DETECTORS
99 GENERAL AND MISCELLANEOUS
B MESONS
CHERENKOV RADIATION
ELECTRONIC CIRCUITS
MESON FACTORIES
READOUT SYSTEMS
TIMING CIRCUITS