FASTBUS Segment Driver microcode description
The FASTBUS Segment Driver, hereafter referred to as the FSD, is a list-driven, microcoded interface between the UNIBUS of a PDP-11 system and the FASTBUS. The list structure used by the FSD allows the programmer on the PDP-11 to program a sequence of data transfers to take place without the aid or intervention of the PDP-11. This allows the FASTBUS to be driven at FSD rates, independent of the PDP-11 processor. Due to the difference in speed between the FASTBUS and UNIBUS, the major goal of the FSD was to provide an interface which could transfer data on FASTBUS without significantly reducing the bandwidth in a multi-master system. This was accomplished by bursting data on the FASTBUS through a 256 word fast buffer internal to the FSD. Data can be transferred at near FASTBUS rates through this memory and only moved on the UNIBUS when the FSD is not master of FASTBUS. This allows other masters in the same system to transfer their data while the FSD is moving data on the slower UNIBUS.
- Research Organization:
- Illinois Univ., Urbana (USA). Dept. of Physics
- DOE Contract Number:
- AC02-76ER01195
- OSTI ID:
- 5760940
- Report Number(s):
- DOE/ER/01195-477; COO-1195-477; ON: DE83017972
- Country of Publication:
- United States
- Language:
- English
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