Translating data flow graphs to architectures

Thesis/Dissertation · Tue Jan 01 04:00:00 EST 1985

OSTI ID:5674957

Raj, V K

Translating a behavioral description of a digital system into an architecture is the initial step in silicon compilation. The behavioral description is in a high level programming language, which is converted to a cyclic-directed graph, called a data flow graph. The design system described here takes this graph as input and translates it to an architecture and a control sequence which together realize the functional definition. The first step in the translation process is the assignment of priority levels to the nodes of the graph. These modes represent (amongst other things) operations in the behavioral description. All nodes belonging to the same priority level are executed at the same instant. The second step involves binding nodes of the graph to components of hardware such as operational units, registers and buses through interaction with a hardware data base. In the third step (optimization step), the user discards components from the hardware and the system re-sequences the graph to allow for the discarded hardware. This approach enabled a flexible design system to be built that facilitates a thorough search of the design space.

• Research Organization: Illinois Univ., Urbana (USA)
• OSTI ID: 5674957
• Country of Publication: United States
• Language: English

Related Subjects

99 GENERAL AND MISCELLANEOUS
990200* -- Mathematics & Computers
ARCHITECTURE
COMPUTER GRAPHICS
DATA-FLOW PROCESSING
DIGITAL SYSTEMS
PROGRAMMING
PROGRAMMING LANGUAGES