On program restructuring, scheduling, and communication for parallel processor systems
- Univ. of Illinois, Urbana, IL (United States)
This dissertation discusses several software and hardware aspects of program execution on large-scale, high-performance parallel processor systems. The issues covered are program restructuring, partitioning, scheduling and interprocessor communication, synchronization, and hardware design issues of specialized units. All this work was performed focusing on a single goal: to maximize program speedup, or equivalently, to minimize parallel execution time. Parafrase, a Fortran restructuring compiler was used to transform programs in a parallel form and conduct experiments. Two new program restructuring techniques are presented, loop coalescing and subscript blocking. Compile-time and run-time scheduling schemes are covered extensively. Depending on the program construct, these algorithms generate optimal or near-optimal schedules. For the case of arbitrarily nested hybrid loops, two optimal scheduling algorithms for dynamic and static scheduling are presented. Simulation results are given for a new dynamic scheduling algorithm. The performance of this algorithm is compared to that of self-scheduling. Techniques for program partitioning and minimization of interprocessor communication for idealized program models and for real Fortran programs are also discussed. The close relationship between scheduling, interprocessor communication, and synchronization becomes apparent at several points in this work. Finally, the impact of various types of overhead on program speedup and experimental results are presented.
- Research Organization:
- Univ. of Illinois, Urbana (United States). Center for Supercomputing Research and Development
- Sponsoring Organization:
- USDOE Office of Science (SC); National Science Foundation (NSF); IBM Corp.; Alliant Computer Corporation
- DOE Contract Number:
- FG02-85ER25001
- OSTI ID:
- 5642627
- Report Number(s):
- DOE/ER/25001-85; CSRD-595; UILU-ENG-86-8006; ON: DE88003532
- Resource Relation:
- Other Information: Thesis (Ph.D). Portions of this document are illegible in microfiche products
- Country of Publication:
- United States
- Language:
- English
Similar Records
A performance analysis of architectural scalability
Performance analysis of architectural scalability
Related Subjects
ARRAY PROCESSORS
COMMUNICATIONS
PARALLEL PROCESSING
PROGRAMMING
TASK SCHEDULING
ALGORITHMS
BENCHMARKS
COMPUTER ARCHITECTURE
FORTRAN
OPERATION
OPTIMIZATION
PERFORMANCE
SYNCHRONIZATION
TRANSLATORS
COMPUTER CODES
DATA PROCESSING
MATHEMATICAL LOGIC
PROCESSING
PROGRAMMING LANGUAGES
990210* - Supercomputers- (1987-1989)