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Logic delays of 5-. mu. m current-switched Josephson gates

Journal Article · · Appl. Phys. Lett.; (United States)
DOI:https://doi.org/10.1063/1.93211· OSTI ID:5582534

Logic delays of a current-switched latching gate called the Josephson atto-Weber switch and its use in a dc powered flip-flop module have been investigated. Experimental circuits with cascade chains of 31 gates were fabricated using 5-..mu..m square lead alloy tunnel junctions. Delays were measured on both the latching and the unlatching chains. The experimental circuits demonstrate operation faster than those reported for other Josephson gate designs using the same linewidth. For the latching OR gate with fanout of 3, the shortest measured gate delay is 15 ps.

Research Organization:
Bell Laboratories, Murray Hill, New Jersey 07974
OSTI ID:
5582534
Journal Information:
Appl. Phys. Lett.; (United States), Journal Name: Appl. Phys. Lett.; (United States) Vol. 40:8; ISSN APPLA
Country of Publication:
United States
Language:
English