Parallel processing method and apparatus for increasing processing throughout by parallel processing low level instructions having natural concurrencies
A parallel processor system is described for processing natural concurrencies in streams of low level instructions contained in a plurality of programs in the system. Each of the streams have single entry-single exit (SESE) basic blocks (BBs). The system consists of: means for statically adding intelligence to each instruction in each of the plurality of basic blocks for each program, the added intelligence at least having a logical processor number (LPN) and an instruction firing time (IFT), context files, each of the context files being assigned to one of the programs for processing one of the programs, each of the context files having at least a plurality of registers and condition code storage for containing processing status information, logical resource drivers (LRDs), each logical resource driver being assigned to one of the plurality of context files, each of the logical resource drivers being receptive of the basic blocks corresponding to the program instruction stream of the assigned program from the adding means.
- Assignee:
- MCC Development, Ltd., Boulder, CO
- Patent Number(s):
- US 4847755
- OSTI ID:
- 5536837
- Country of Publication:
- United States
- Language:
- English
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