Soudan 2 data acquisition and trigger electronics
The 1.1 kton Soudan 2 detector is read out by 16K anode wires and 3 2K cathode strips. Preamps from each wire or strip are bussed together in groups of 8 to reduce the number of ADC channels. The resulting 6144 channels of ionization signal are flash-digitized every 150 ns and stored in RAM. The raw data hit patterns are continually compared with programmable trigger multiplicity and adjacency conditions. The data acquisition process is managed in a system of 24 parallel crates each containing an Intel 8086 microprocessors, which supervises a pipe-lined data compactors, and allows transfer of the compacted data via CAMAC to the host computer. The 8086's also manage the local trigger conditions and can perform some parallel processing of the data. Due to the scale of the system and multiplicity of identical channels, semi-custom gate array chips are used for much of the logic, utilizing 2.5 micron CMOS technology.
- Research Organization:
- Argonne National Lab., IL (USA); Minnesota Univ., Minneapolis (USA)
- DOE Contract Number:
- W-31109-ENG-38
- OSTI ID:
- 5474441
- Report Number(s):
- CONF-850579-3; ON: DE85013864
- Country of Publication:
- United States
- Language:
- English
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Related Subjects
72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS
BARYONS
CAMAC SYSTEM
COMPUTERS
DATA ACQUISITION SYSTEMS
DECAY
ELECTRONIC CIRCUITS
ELEMENTARY PARTICLES
FERMIONS
HADRONS
MEASURING INSTRUMENTS
MICROELECTRONIC CIRCUITS
MICROPROCESSORS
NUCLEONS
OPERATION
PARALLEL PROCESSING
PARTICLE DECAY
PRINTED CIRCUITS
PROGRAMMING
PROPORTIONAL COUNTERS
PULSE CIRCUITS
RADIATION DETECTORS
READOUT SYSTEMS
TRIGGER CIRCUITS
WEAK PARTICLE DECAY