Compensation implants in 6H{endash}SiC
- Department of Electrical and Computer Engineering, George Mason University, Fairfax, Virginia 22030 (United States)
- Department of Electronic Materials Engineering, Australian National University, Canberra, ACT 2601 (Australia)
- Naval Research Laboratory, Washington, D.C. 20375 (United States)
In this work, we have performed Si and C isoelectronic implantations in n-type and {ital vanadium} (V) implantations in p-type 6H{endash}SiC to obtain highly resistive regions. The compensation is achieved by the lattice damage created by the Si and C implantations and the chemically active nature of the V implant. For the Si and C implantations, the as-implanted resistivity initially increased with increasing implant fluence due to the introduction of compensating levels caused by the lattice damage, then decreased at higher fluences due to hopping conduction of the trapped carriers. The resistivity of the Si and C implanted material has been measured after isochronal heat treatments over the temperature range of 400{endash}1000{degree}C. The maximum resistivity values measured for Si and C implanted and heat treated material were {approximately}10{sup 12}{Omega}cm. For the 700{degree}C V implantation in p-type SiC, resistivities of {gt}10{sup 12}{Omega}cm were measured after 1500 or 1600{degree}C annealing to activate the V implant. Redistribution of the V implant is observed after annealing. {copyright} {ital 1997 American Institute of Physics.}
- OSTI ID:
- 543766
- Journal Information:
- Journal of Applied Physics, Journal Name: Journal of Applied Physics Journal Issue: 9 Vol. 82; ISSN JAPIAU; ISSN 0021-8979
- Country of Publication:
- United States
- Language:
- English
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