Fully parallel mixed-radix conversion algorithm for residue number applications
Journal Article
·
· IEEE Trans. Comput.; (United States)
A new, fully parallel mixed-radix conversion (MRC) algorithm which utilises the maximum parallelism which exists in the residue (RNS) to mixed-radix (MR) digit conversion to achieve high throughput rate and very short conversion time is presented. The new algorithm has a conversion time of two table look-up cycles for moduli sets consisting of up to 15 moduli. As a comparison, the classical Szabo and Tanaka MRC algorithm has a conversion time of (n-1) clock cycles for an n-moduli rns. This algorithm can be implemented by off-the-shelf ECL ICS to achieve a conversion time of 50 ns and a throughput of 40 mhz for a 150-bit rns. 5 references.
- Research Organization:
- Communication Science Lab., Palo Alto, CA
- OSTI ID:
- 5436797
- Journal Information:
- IEEE Trans. Comput.; (United States), Journal Name: IEEE Trans. Comput.; (United States) Vol. 4; ISSN ITCOB
- Country of Publication:
- United States
- Language:
- English
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