Small, high-speed dataflow processor
Dataflow processors show much promise for high-speed computation at reasonable cost, but they are not without problems. The author discusses a processor design which combines ideas from dynamic dataflow architecture with those from reduced instruction set computers and proven large computers with parallel internal structures. The resulting processor includes a number of innovations, including operand destinations, killer tokens, I/O streams and closed-loop computation, which result in a small, relatively inexpensive processor capable of high-speed computation. The expected application areas of the processor include interactive computer graphics, signal processing, and artificial intelligence. 6 references.
- OSTI ID:
- 5364461
- Country of Publication:
- United States
- Language:
- English
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