Efficient VLSI networks for parallel processing based on orthogonal trees

Journal Article · Wed Jun 01 04:00:00 EDT 1983 · IEEE Trans. Comput.; (United States)

DOI:https://doi.org/10.1109/TC.1983.1676279· OSTI ID:5294727

Nath, D; Maheshwari, S N; Bhatt, P C.P.

Two interconnection networks for parallel processing, namely the orthogonal trees network and the orthogonal tree cycles (OTN and OTC) are discussed. Both networks are suitable for VLSI implementation and have been analysed using Thompson's model of VLSI. While the OTN and OTC have time performances similar to fast networks such as the perfect shuffle network (PSN), the cube connected cycles (CCC), etc., they have substantially better area* time/sup 2/ performances for a number of matrix and graph problems. For instance, the connected components and a minimal spanning tree of an undirected n-vertex graph can be found in 0(log/sup 4/ n) time on the OTC with an area* time/sup 2/ performance of 0(n/sup 2/ log/sup 8/ n) and 0(n/sup 2/ log/sup 9/ n) respectively. This is asymptotically much better than the performances of the CCC, PSN and MESH. The OTC and OTN can be looked upon as general purpose parallel processors since a number of other problems such as sorting and DFT can be solved on them with an area* time/sup 2/ performance matching that of other networks. Finally, programming the OTN and OTC is simple and they are also amenable to pipelining a series of problems. 33 references.

• Research Organization: Indian Institute of Technology, New Delhi
• OSTI ID: 5294727
• Journal Information: IEEE Trans. Comput.; (United States), Journal Name: IEEE Trans. Comput.; (United States) Vol. 6; ISSN ITCOB
• Country of Publication: United States
• Language: English

Related Subjects

99 GENERAL AND MISCELLANEOUS
990200* -- Mathematics & Computers
ARCHITECTURE
COMPUTER NETWORKS
MATHEMATICS
PARALLEL PROCESSING
PROGRAMMING