High-speed FIR digital filter using residue number arithmetic implemented in multiple-valued logic
Book
·
OSTI ID:5294251
High-speed digital filters are designed using residue number system (RNS) computing hardware implemented in multiple-valued logic (MVL). Two digit MVL moduli of 5, 7, and 8 levels respectively (moduli 25, 49, and 64) yield a 16-bit computational precision suitable for 8-bit input and output signals. The proposed structure is highly pipelined and offers high speed (i.e. 20 mhz throughout) with fewer components and much fewer interconnections when compared with a binary implementation. 7 references.
- OSTI ID:
- 5294251
- Country of Publication:
- United States
- Language:
- English
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