CMOS inter-chip interconnection circuit using high-Tc superconducting tunnel junctions and interconnections

Journal Article · Tue Aug 01 04:00:00 EDT 1989 · IEEE Electron Device Letters; (USA)

DOI:https://doi.org/10.1109/55.31761· OSTI ID:5290135

Ghoshal, U ^[1]

---

1. MCC Superconductivity Program, Austin, TX (US)

This paper analyzes a possible low-voltage CMOS interconnection circuit utilizing high-Tc superconducting tunnel junctions (TJ's) and interconnections for very high-speed inter-chip communication at low temperatures (4-77{Kappa}). The circuit dissipates five to eight times less power than conventional designs, produces very small current transients, and has good immunity to noise from input voltage fluctuations, crosstalk, and simultaneous switching of drivers.

• OSTI ID: 5290135
• Journal Information: IEEE Electron Device Letters; (USA), Journal Name: IEEE Electron Device Letters; (USA) Vol. 10:8; ISSN EDLED; ISSN 0741-3106
• Country of Publication: United States
• Language: English

Related Subjects

426001* -- Engineering-- Superconducting Devices & Circuits-- (1990-)
75 CONDENSED MATTER PHYSICS
SUPERCONDUCTIVITY AND SUPERFLUIDITY
COMMUNICATIONS
DESIGN
ELECTRICAL TRANSIENTS
ELECTRONIC CIRCUITS
HIGH TEMPERATURE
INTEGRATED CIRCUITS
JUNCTIONS
LOW TEMPERATURE
MICROELECTRONIC CIRCUITS
MOS TRANSISTORS
SEMICONDUCTOR DEVICES
SUPERCONDUCTING JUNCTIONS
SWITCHING CIRCUITS
TRANSIENTS
TRANSISTORS
VOLTAGE DROP