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Title: Novel high temperature multilayer electrode-barrier structure for high-density ferroelectric memories

Journal Article · · Applied Physics Letters
DOI:https://doi.org/10.1063/1.119840· OSTI ID:527957
; ; ; ; ;  [1];  [2]
  1. Department of Materials Science and Engineering, Thin-Films Laboratory, Virginia Tech, Blacksburg, Virginia 24061-0237 (United States)
  2. Electronic Materials and Structures Group, IBM Corporation, Yorktown Heights, New York 10598 (United States)

This has been accomplished in the past using four/five separate electrode- and diffusion-barrier layers. In this letter, we report a novel Pt{endash}Rh{endash}O{sub x}/Pt{endash}Rh/Pt{endash}Rh{endash}O{sub x} electrode-barrier structure which acts as an electrode as well as a diffusion barrier for integration of the ferroelectric capacitors directly onto silicon deposited using an {ital in situ} reactive rf sputtering process. The electrodes have a smooth and fine grained microstructure and are excellent diffusion barriers between the PbZr{sub 0.53}Ti{sub 0.47}O{sub 3} (PZT) and Si substrate and exhibit good thermal stability up to very high processing temperatures of 700{degree}C. The ferroelectric (PZT) test capacitors using these electrode barriers grown directly on Si, show well saturated hysteresis loops with P{sub r} and E{sub c} of 16 {mu}C/cm{sup 2} and 30{endash}40 kV/cm, respectively. The capacitors exhibit no significant fatigue loss ({lt}5{percent}) up to 10{sup 11} cycles and have low leakage currents (2{times}10{sup {minus}8} A/cm{sup 2} at 100 kV/cm). These electrode barriers can be used to directly integrate the thin film capacitors on the source/drain of the transistors of the memory cell structure for accomplishing large scale integration.{copyright} {ital 1997 American Institute of Physics.}

OSTI ID:
527957
Journal Information:
Applied Physics Letters, Vol. 71, Issue 5; Other Information: PBD: Aug 1997
Country of Publication:
United States
Language:
English