Scheduling multiple processors with memory constraints
Conference
·
OSTI ID:5106643
The author considers the problem of preemptively scheduling n jobs on m processors. The ith job has a processing requirement p/sub i/, a memory requirement q/sub i/, a release time r/sub i/ and a deadline d/sub i/. The ith processor has a speed s/sub i/ and a memory capacity c/sub i/. The ith job can be run on the jth processor iff c/sub j/>q/sub i/. The main result is for the case when all jobs are released at time zero and all have a common deadline d. In this case an o(nlogm) algorithm will construct a schedule to meet this deadline or show that no such schedule exists. This algorithm can then be used with search techniques to find a schedule which minimizes the maximum completion time. When the release times and deadlines vary and all machines have the same speed, a network flow formulation can be used to find a feasible schedule in o(mn/sup 3/logn). When the processors have different speeds a linear programming formulation can be used to find a feasible schedule and to minimize maximum lateness. 9 references.
- OSTI ID:
- 5106643
- Country of Publication:
- United States
- Language:
- English
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