Routing problems in the physical design integrated circuits

Thesis/Dissertation · Wed Jan 01 04:00:00 EST 1986

OSTI ID:5064822

Leong, H W

An approach to the physical design of integrated circuits is studied in which some design flexibilities are incorporated into the routing step via suitable generalizations of the routing model. Better layouts are obtained using this approach since the router can make use of these flexibilities to reduce the wiring area. Three different models for channel routing are considered - traditional channel routing, and generalizations to discretionary channel routing where it is only required that each net connect some (not all) of its pins, and permutation channel routing where some of the pins are allowed to be interchanged. It is shown that these generalizations can handle design flexibilities such as physically and logically equivalent pins, duplicated pins in macrocells, and input/output in assignments in programmable logic devices. For the traditional model, a new simulated annealing channel routing algorithm is presented whose performance is competitive with other well-known channel routers in the literature. Efficient algorithms for the discretionary and permutation channel routing problems are also presented. These algorithms were implemented and tested on various data, and results show that they produce near-optimal solutions. More importantly, these results show that substantial savings in the wiring area can be achieved by using the generalized models.

• Research Organization: Illinois Univ., Urbana (USA)
• OSTI ID: 5064822
• Country of Publication: United States
• Language: English

Related Subjects

99 GENERAL AND MISCELLANEOUS
990200* -- Mathematics & Computers
ALGORITHMS
DESIGN
ELECTRONIC CIRCUITS
FUNCTIONAL MODELS
INTEGRATED CIRCUITS
MATHEMATICAL LOGIC
MICROELECTRONIC CIRCUITS
ROUTING