VLSI implementation of moment invariants for automated inspection

Conference · Mon Jan 01 04:00:00 EST 1990

DOI:https://doi.org/10.1109/SSST.1990.138197· OSTI ID:5037123

Armstrong, G A; Simpson, M L ^[1]; Bouldin, D W ^[2]

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1. Oak Ridge National Lab., TN (USA)
2. Tennessee Univ., Knoxville, TN (USA)

This paper describes the design of a VLSI ASIC for use in automated inspection. The inspection scheme uses Hu and Maitra's algorithms for moment invariants. A prototype design was generated that resolved the long delay time of the multiplier by custom designing adder cells based on the Manchester carry chain. The prototype ASIC is currently being fabricated in 2.0-{mu}m CMOS technology and has been simulated at 20 MHz. The final ASICs will be used in parallel at the board level to achieve the 230 MOPs necessary to perform the moment invariant algorithms in real time on 512 {times} 512 pixel images with 256 grey scales. 10 refs., 2 figs.

• Research Organization: Oak Ridge National Lab., TN (USA)
• Sponsoring Organization: DOE/ER
• DOE Contract Number: AC05-84OR21400
• OSTI ID: 5037123
• Report Number(s): CONF-900378-1; ON: DE90005318
• Country of Publication: United States
• Language: English

Related Subjects

42 ENGINEERING
426000* -- Engineering-- Components
Electron Devices & Circuits-- (1990-)
99 GENERAL AND MISCELLANEOUS
990200 -- Mathematics & Computers
ALGORITHMS
AUTOMATION
COMPUTER ARCHITECTURE
DESIGN
ELECTRONIC CIRCUITS
IMAGE PROCESSING
INTEGRATED CIRCUITS
MATHEMATICAL LOGIC
MICROELECTRONIC CIRCUITS
PERFORMANCE TESTING
PROCESSING
TESTING