Single event gate rupture in thin gate oxides
As integrated circuit densities increase with each new technology generation, both the lateral and vertical dimensions shrink. Operating voltages, however, have not scaled as aggressively as feature size, with a resultant increase in the electric fields within advanced geometry devices. Oxide electric fields are in fact increasing to greater than 5 MV/cm as feature size approaches 0.1 {micro}m. This trend raises the concern that single event gate rupture (SEGR) may limit the scaling of advanced integrated circuits (ICs) for space applications. The dependence of single event gate rupture (SEGR) critical field on oxide thickness is examined for thin gate oxides. Critical field for SEGR increases with decreasing oxide thickness, consistent with an increasing intrinsic breakdown field.
- Research Organization:
- Sandia National Labs., Albuquerque, NM (United States)
- Sponsoring Organization:
- USDOE, Washington, DC (United States)
- DOE Contract Number:
- AC04-94AL85000
- OSTI ID:
- 491556
- Report Number(s):
- SAND--97-0426C; CONF-970711--11; ON: DE97003202
- Country of Publication:
- United States
- Language:
- English
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