Effects of CdTe growth conditions and techniques on the efficiency limiting defects and mechanisms in CdTe solar cells
- School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, Georgia 30332 (United States)
- School of Physics, Georgia Institute of Technology, Atlanta, Georgia 30332 (United States)
- Department of Electrical Engineering, University of South Florida, Tampa, Florida 33620 (United States)
CdTe solar cells were fabricated by depositing CdTe films on CdS/SnO{sub 2}/glass substrates using close-spaced sublimation (CSS) and metalorganic chemical vapor deposition (MOCVD). Te/Cd mole ratio was varied in the range of 0.02 to 6 in the MOCVD growth ambient in an attempt to vary the native defect concentration. Polycrystalline CdTe layers grown by MOCVD and CSS both showed average grain size of about 2 {mu}m. However, the CdTe films grown by CSS were found to be less faceted and more dense compared to the CdTe grown by MOCVD. CdTe growth techniques and conditions had a significant impact on the electrical characteristics of the cells. The CdTe solar cells grown by MOCVD in the Te-rich growth condition and by the CSS technique gave high cell efficiencies of 11.5{percent} and 12.4{percent}, respectively, compared to 6.6{percent} efficient MOCVD cells grown in Cd-rich conditions. This large difference in efficiency is explained on the basis of (a) XRD measurements which showed a higher degree of atomic interdiffusion at the CdS/CdTe interface in high performance devices, (b) Raman measurements which endorsed more uniform and preferred grain orientation by revealing a sharp CdTe TO mode in the high efficiency cells, and (c) carrier transport mechanism which switched from tunneling/interface recombination to depletion region recombination in the high efficiency cells. In this study, Cu/Au layers were evaporated on CdTe for the back contact. Lower efficiency of the Te-rich MOCVD cells, compared to the CSS cells, was attributed to contact related additional loss mechanisms, such as Cd pile-up near Cu/CdTe interface which can give rise to Cd-vacancy defects in the bulk, and higher Cu concentration in the CdTe layer which can cause shunts in the device. Finally, SIMS measurements on the CdTe films of different crystallinity and grain size confirmed that grain boundaries are the main conduits for Cu migration into the CdTe film. (Abstract Truncated)
- Sponsoring Organization:
- USDOE
- OSTI ID:
- 450115
- Report Number(s):
- CONF-9605265-; ISSN 0094-243X; TRN: 9703M0043
- Journal Information:
- AIP Conference Proceedings, Vol. 353, Issue 1; Conference: 13. NREL photovoltaics program review meeting, Lakewood, CO (United States), 16-19 May 1996; Other Information: PBD: Jan 1996
- Country of Publication:
- United States
- Language:
- English
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