D0 muon readout electronics design

Conference · Fri Nov 01 04:00:00 EST 1996 · IEEE Trans.Nucl.Sci.

DOI:https://doi.org/10.1109/23.603672· OSTI ID:434911

Baldin, B. ^[1]; Hansen, S. ^[1]; Los, S. ^[2]; Matveev, M. ^[2]; Vanev, V. ^[2]

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1. Fermilab
2. Serpukhov, IHEP

The readout electronics designed for the DO Muon Upgrade are described. These electronics serve three detector subsystems and one trigger system. The front-ends and readout hardware are synchronized by means of timing signals broadcast from the DO Trigger Framework. The front-end electronics have continuously running digitizers and two levels of buffering resulting in nearly deadtimeless operation. The raw data is corrected and formatted by 16-bit fixed point DSP processors. These processors also perform control of the data buffering. The data transfer from the front-end electronics located on the detector platform is performed by serial links running at 160 Mbit/s. The design and test results of the subsystem readout electronics and system interface are discussed

• Research Organization: Fermi National Accelerator Laboratory (FNAL), Batavia, IL (United States)
• Sponsoring Organization: USDOE Office of Science (SC), High Energy Physics (HEP) (SC-25)
• DOE Contract Number: AC02-07CH11359
• OSTI ID: 434911
• Report Number(s): FERMILAB-CONF-96-404; oai:inspirehep.net:428455
• Conference Information: Journal Name: IEEE Trans.Nucl.Sci. Journal Volume: 44
• Country of Publication: United States
• Language: English

Related Subjects

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY
DATA ACQUISITION SYSTEMS
DATA TRANSMISSION
DESIGN
FERMILAB TEVATRON
MUON DETECTION
READOUT SYSTEMS
SHOWER COUNTERS