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Calculation and Validation of Thermomechanical Stresses in Flip Chip BGA Using the ATC4.2 Test Vehicle

Conference ·
OSTI ID:4256

We report the first in situ measurements of thermomechanical stresses in a 1000 I/O 250 {micro}m pitch piezoresistive flip chip test chip assembled to a 755 I/O 1.0 mm pitch 35 mm Ball Grid Array (BGA). The BGA substrates employed build-up dielectric layers containing micro-vias over conventional fiberglass laminate cores. Experimental data, which include in situ stress and die bending measurements, were correlated to closed form and Finite Element Method (FEM) calculations. Cracking and delamination were observed in some of the experimental groups undergoing temperature cycling. Through use of bounding conditions in the FEM simulations, these failures were associated with debonding of the underfill fillet from the die edge that caused stresses to shift to weaker areas of the package.

Research Organization:
Sandia National Labs., Albuquerque, NM (US); Sandia National Labs., Livermore, CA (US)
Sponsoring Organization:
US Department of Energy (US)
DOE Contract Number:
AC04-94AL85000
OSTI ID:
4256
Report Number(s):
SAND98-2800C
Country of Publication:
United States
Language:
English