Polysilicon thin film transistors fabricated on low temperature plastic substrates
- Lawrence Livermore National Laboratory, P. O. Box 808, L-271, Livermore, California 94551 (United States)
We present device results from polysilicon thin film transistors (TFTs) fabricated at a maximum temperature of 100&hthinsp;{degree}C on polyester substrates. Critical to our success has been the development of a processing cluster tool containing chambers dedicated to laser crystallization, dopant deposition, and gate oxidation. Our TFT fabrication process integrates multiple steps in this tool, and uses the laser to crystallize deposited amorphous silicon as well as create heavily doped TFT source/drain regions. By combining laser crystallization and doping, a plasma enhanced chemical vapor deposition SiO{sub 2} layer for the gate dielectric, and postfabrication annealing at 150&hthinsp;{degree}C, we have succeeded in fabricating TFTs with I{sub ON}/I{sub OFF} ratios {gt}5{times}10{sup 5} and electron mobilities {gt}40 cm{sup 2}/V&hthinsp;s on polyester substrates. {copyright} {ital 1999 American Vacuum Society.}
- OSTI ID:
- 359799
- Report Number(s):
- CONF-981126--
- Journal Information:
- Journal of Vacuum Science and Technology, A, Journal Name: Journal of Vacuum Science and Technology, A Journal Issue: 4 Vol. 17; ISSN 0734-2101; ISSN JVTAD6
- Country of Publication:
- United States
- Language:
- English
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