The Sematech failure analysis roadmap
- Intel Corp., Folsom, CA (United States)
- National Semiconductor Corp., Santa Clara, CA (United States)
- Hewlett-Packard, Corvallis, OR (United States); and others
A failure analysis (FA) technology roadmap that addresses a broad set of needs through the year 2007 is described. It is derived from the 1994 edition of the Semiconductor Industry Association (SIA) National Technology Roadmap For Semiconductors. The material for this paper has been generated as a result of the combined effort of all the Sematech member company failure analysis representatives, collectively known as the Sematech Product Analysis (PA) Forum. This document is intended as a roadmap of future challenges for those who are involved in performing failure analysis of complementary metal oxide semiconductor (CMOS) ultra large scale integration (ULSI) circuits and its variants, the suppliers of equipment and services to the FA community, and the various strategic planning organizations in the semiconductor industry, e.g., design, test and process development groups. Incorporated in this publication are the relevant elements of the semiconductor technology roadmap, which serves as the primary driver of the FA capabilities, the resulting FA challenges, and the key capabilities that are needed to meet these FA challenges through the technology generations.
- OSTI ID:
- 260492
- Report Number(s):
- CONF-951156--; ISBN 0-87170-554-0
- Country of Publication:
- United States
- Language:
- English
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