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Cryogenic Front-End ASICs for Low-Noise Readout of Charge Signals

Journal Article · · IEEE Transactions on Circuits and Systems I: Regular Papers
This paper presents design details and measurement results of LArASIC, a front-end application specific integrated circuit (ASIC) designed for low-noise readout of charge signals generated in neutrino study experiments within liquid argon time projection chambers. LArASIC comprises of 16-channels of programmable charge amplification and pulse shaping stages that provide a voltage readout proportional to the input charge and was optimized for operation at liquid argon temperature, i.e., 89 K. The chip was fabricated in a 180 nm CMOS process. Measurements at liquid nitrogen temperature, i.e., 77 K, indicate that the channel outputs have high linearity (INL < 0.1%) within the operating range, an equivalent noise charge of 534 electrons for a peaking time of 1 µs and a detector capacitance of 150 pF, and a worst-case inter-channel cross-talk of 0.35%. The paper also presents design choices made in the process of migrating LArASIC to CHARMS, an ASIC to be fabricated in a 65 nm process that includes all features provided by LArASIC, along with additional digital programmability for improved robustness and flexibility. CHARMS is intended for use in future high-energy physics experiments that require high-resolution charge or light readout with shorter pulse peaking times.
Research Organization:
Brookhaven National Laboratory (BNL), Upton, NY (United States)
Sponsoring Organization:
USDOE Office of Science (SC), Basic Energy Sciences (BES)
Grant/Contract Number:
SC0012704
OSTI ID:
2500294
Report Number(s):
BNL--226481-2025-JAAM
Journal Information:
IEEE Transactions on Circuits and Systems I: Regular Papers, Journal Name: IEEE Transactions on Circuits and Systems I: Regular Papers Journal Issue: 4 Vol. 72; ISSN 1549-8328
Publisher:
IEEECopyright Statement
Country of Publication:
United States
Language:
English

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