A 32-Channel Cryo-CMOS ASIC for SNSPD Biasing and Readout with Picosecond Timing
- Fermilab
Superconducting nanowire single-photon detectors (SNSPD) are a promising technology for particle detection. Although SNSPDs have demonstrated picosecond timing accuracy, scaling up large arrays has proved challenging. In this work, we introduce a 32-channel cryo-CMOS application-specifc integrated circuit (ASIC) that can be tightly integrated with SNSPD arrays. The ASIC is designed to operate at a temperature of 4K and can perform up to 32 simultaneous timing measurements with a root-mean-square (RMS) accuracy of 8.0ps. The ASIC includes on-chip circuitry for externally biasing superconducting devices, low-noise amplifers for reading superconducting devices, high-resolution time-to-digital converters (TDC) for time-tagging events, and serializers for transmitting data to room-temperature electronics. The ASIC is manufactured in a 22nm FDSOI process and occupies an area of 4.0mm x 1.0mm. The performance of the ASIC was verifed using custom cryogenic device models internally developed for the 22nm SOI process. Measurement results will be presented at the conference.
- Research Organization:
- Fermi National Accelerator Laboratory (FNAL), Batavia, IL (United States)
- Sponsoring Organization:
- USDOE Office of Science (SC), High Energy Physics (HEP) (SC-25)
- DOE Contract Number:
- AC02-07CH11359
- OSTI ID:
- 2477632
- Report Number(s):
- FERMILAB-SLIDES-24-0294-ETD; oai:inspirehep.net:2848609
- Country of Publication:
- United States
- Language:
- English
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