Double-gate SnO{sub 2} nanowire electric-double-layer transistors with tunable threshold voltage

Journal Article · Mon Jun 08 04:00:00 EDT 2015 · Applied Physics Letters

DOI:https://doi.org/10.1063/1.4922453· OSTI ID:22423754

Liu, Huixuan ^[1]

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1. Faculty of Communication and Electronics, Jiangxi Science and Technology Normal University, Nanchang, 330013 (China)

Double-gate Sb-SnO{sub 2} nanowire electric-double-layer (EDL) transistors with in-plane gates were fabricated using only one shadow mask. The threshold voltage of such devices can be tuned in a wide range from −0.13 V to 0.72 V by the in-plane gate, which allows the device to switch from depletion-mode to enhancement-mode operation. The operation voltage of the double-gate device is 1 V because the EDL gate dielectric can lead to a high gate capacitance (>3.5 μF/cm{sup 2}). Moreover, all double-gate devices show good electrical characteristics with high field-effect mobility (>200 cm{sup 2}/V·s), high drain-current I{sub on/off} ratio (>7 × 10{sup 4}), and small subthreshold slope (<100 mV/dec). These double-gate nanowire EDL transistors can pave the way for an electrically working low-voltage nano-electronic process.

• OSTI ID: 22423754
• Journal Information: Applied Physics Letters, Journal Name: Applied Physics Letters Journal Issue: 23 Vol. 106; ISSN APPLAB; ISSN 0003-6951
• Country of Publication: United States
• Language: English

Related Subjects

75 CONDENSED MATTER PHYSICS
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77 NANOSCIENCE AND NANOTECHNOLOGY
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NANOWIRES
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