Electrical properties of the InP/InGaAs pnp heterostructure-emitter bipolar transistor

Journal Article · Sat Mar 15 00:00:00 EDT 2008 · Semiconductors

DOI:https://doi.org/10.1007/S11453-008-3019-0· OSTI ID:21087902

Liu, W Ch ^[1]; Guo, D F ^[2]; Kang, Y Ch ^[3]; Chiu, Sh Y; Lour, W Sh ^[4]

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1. National Cheng-Kung University, Institute of Microelectronics, Department of Electrical Engineering (China)
2. Air Force Academy, Department of Electronic Engineering (China)
3. National Kaohsiung Normal University, Department of Electronic Engineering (China)
4. National Taiwan Ocean University, Department of Electrical Engineering (China)

The dc performances of an InP/InGaAs pnp heterostructure-emitter bipolar transistor are investigated by theoretical analysis and experimental results. Though the valence band discontinuity at the InP/InGaAs heterojunction is relatively large, the addition of a heavily-doped as well as thin p{sup +}-InGaAs emitter layer between p-InP confinement and n{sup +}-InGaAs base layers effectively eliminates the potential spike at emitter-base junction and simultaneously lowers the emitter-collector offset voltage and increases the potential barrier for electrons. Experimentally, a high current gain of 88 and a low offset voltage of 54 mV have been achieved.

• OSTI ID: 21087902
• Journal Information: Semiconductors, Journal Name: Semiconductors Journal Issue: 3 Vol. 42; ISSN SMICES; ISSN 1063-7826
• Country of Publication: United States
• Language: English

Related Subjects

36 MATERIALS SCIENCE
DOPED MATERIALS
ELECTRICAL PROPERTIES
GALLIUM ARSENIDES
HETEROJUNCTIONS
INDIUM ARSENIDES
INDIUM PHOSPHIDES
PERFORMANCE
TRANSISTORS