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Title: Impact of GaAs buffer thickness on electronic quality of GaAs grown on graded Ge/GeSi/Si substrates

Journal Article · · Applied Physics Letters
DOI:https://doi.org/10.1063/1.126200· OSTI ID:20215789
 [1];  [1];  [2];  [3];  [4]
  1. Department of Electrical Engineering, The Ohio State University, Columbus, Ohio 43210-1272 (United States)
  2. Massachusetts Institute of Technology, Cambridge, Massachusetts 02139 (United States)
  3. Amberwave Systems Corp., Woburn, Massachusetts 01801 (United States)
  4. National Renewable Energy Laboratory, Golden, Colorado 80401 (United States)

Minority carrier lifetimes and interface recombination velocities for GaAs grown on a Si wafer using compositionally graded GeSi buffers have been investigated as a function of GaAs buffer thickness using monolayer-scale control of the GaAs/Ge interface nucleation during molecular beam epitaxy. The GaAs layers are free of antiphase domain disorder, with threading dislocation densities measured by etch pit density of 5x10{sup 5}-2x10{sup 6} cm{sup -2}. Analysis indicates no degradation in either minority carrier lifetime or interface recombination velocity down to a GaAs buffer thickness of 0.1 {mu}m. In fact, record high minority carrier lifetimes exceeding 10 ns have been obtained for GaAs on Si with a 0.1 {mu}m GaAs buffer. Secondary ion mass spectroscopy reveals that cross diffusion of Ga, As, and Ge at the GaAs/Ge interface formed on the graded GeSi buffers are below detection limits in the interface region, indicating that polarity control of the GaAs/Ge interface formed on GeSi/Si substrates can be achieved. (c) 2000 American Institute of Physics.

OSTI ID:
20215789
Journal Information:
Applied Physics Letters, Vol. 76, Issue 14; Other Information: PBD: 3 Apr 2000; ISSN 0003-6951
Country of Publication:
United States
Language:
English