The ETROC2 prototype for CMS MTD Endcap Timing Layer (ETL) upgrade

Conference · Tue Jul 18 00:00:00 EDT 2023

OSTI ID:1993472

Gong, Datao ^[1]

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1. Fermilab

The Endcap Timing ReadOut Chip (ETROC) is designed to process LGAD signals with time resolution down to about 40-50ps per hit. The ETROC2 is the first full size (16x16) prototype design with the front-end based on and scaled up from the ETROC1 (4x4). The readout designs at pixel and global level and the system interfaces are all new and are compatible with the final chip specifications in terms of functionality. The ETROC2 is intended as a learning chip, as a stepstone to the ETROC3 which is intended as the pre-production design. The ETROC2 design and test results will be presented.

• Research Organization: Fermi National Accelerator Laboratory (FNAL), Batavia, IL (United States)
• Sponsoring Organization: USDOE Office of Science (SC), High Energy Physics (HEP) (SC-25)
• DOE Contract Number: AC02-07CH11359
• OSTI ID: 1993472
• Report Number(s): FERMILAB-CONF-23-240-PPD; oai:inspirehep.net:2678093
• Country of Publication: United States
• Language: English

Related Subjects

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS