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Quality of service for input/output memory management unit

Patent ·
OSTI ID:1859944
; ;
A data processing system includes a memory, a group of input/output (I/O) devices, an input/output memory management unit (IOMMU). The IOMMU is connected to the memory and adapted to allocate a hardware resource from among a group of hardware resources to receive an address translation request for a memory access from an I/O device. The IOMMU detects address translation requests from the plurality of I/O devices. The IOMMU reorders the address translation requests such that an order of dispatching an address translation request is based on a policy associated with the I/O device that is requesting the memory access. The IOMMU selectively allocates a hardware resource to the input/output device, based on the policy that is associated with the I/O device in response to the reordering.
Research Organization:
Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States); Advanced Micro Devices, Inc., Santa Clara, CA (United States)
Sponsoring Organization:
USDOE
DOE Contract Number:
AC52-07NA27344;
Other Award/Contract Number:
B620717
Assignee:
Advanced Micro Devices, Inc. (Santa Clara, CA)
Patent Number(s):
11,144,473
Application Number:
16/007,027
OSTI ID:
1859944
Country of Publication:
United States
Language:
English

References (8)

Lynn: A Multi-dimensional Dynamic Resource Management System for Distributed Applications in Clouds conference November 2013
Supporting x86-64 address translation for 100s of GPU lanes conference February 2014
KPart: A Hybrid Cache Partitioning-Sharing Technique for Commodity Multicores conference February 2018
Dynamic memory allocation technique for virtual machines conference March 2015
Observations and opportunities in architecting shared virtual memory for heterogeneous systems conference April 2016
Managing DRAM Latency Divergence in Irregular GPGPU Applications
  • Chatterjee, Niladrish; O'Connor, Mike; Loh, Gabriel H.
  • SC14: International Conference for High Performance Computing, Networking, Storage and Analysis https://doi.org/10.1109/SC.2014.16
conference November 2014
Vantage conference January 2011
Architectural support for address translation on GPUs
  • Pichai, Bharath; Hsu, Lisa; Bhattacharjee, Abhishek
  • Proceedings of the 19th international conference on Architectural support for programming languages and operating systems https://doi.org/10.1145/2541940.2541942
conference February 2014

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