Unified Memory: GPGPU-Sim/UVM Smart Integration
- Purdue Univ., West Lafayette, IN (United States)
- Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)
CPU/GPU heterogeneous compute platforms are an ubiquitous element in computing and a programming model specified for this heterogeneous computing model is important for both performance and programmability. A programming model that exposes the shared, unified, address space between the heterogeneous units is a necessary step in this direction as it removes the burden of explicit data movement from the programmer while maintaining performance. GPU vendors, such as AMD and NVIDIA, have released software-managed runtimes that can provide programmers the illusion of unified CPU and GPU memory by automatically migrating data in and out of the GPU memory. However, this runtime support is not included in GPGPU-Sim, a commonly used framework that models the features of a modern graphics processor that are relevant to non-graphics applications. UVM Smart was developed, which extended GPGPU-Sim 3.x to in- corporate the modeling of on-demand pageing and data migration through the runtime. This report discusses the integration of UVM Smart and GPGPU-Sim 4.0 and the modifications to improve simulation performance and accuracy.
- Research Organization:
- Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)
- Sponsoring Organization:
- USDOE National Nuclear Security Administration (NNSA); USDOE Office of Nuclear Energy (NE), Nuclear Energy Advanced Modeling and Simulation (NEAMS)
- DOE Contract Number:
- NA0003525
- OSTI ID:
- 1844477
- Report Number(s):
- SAND2022-1528; 703379
- Country of Publication:
- United States
- Language:
- English
Similar Records
SV-Sim: Scalable PGAS-based State Vector Simulation of Quantum Circuits
The Tradeoffs of Fused Memory Hierarchies in Heterogeneous Computing Architectures