Facet Suppression in (100) GaAs Spalling via Use of a Nanoimprint Lithography Release Layer
Controlled spalling is an emerging technique developed for fast, scalable wafer reuse, but for the commonly used (100) GaAs substrate system, the process leaves large facets ranging from 5-10 µm on the wafer surface. Removing them for wafer reuse requires a costly re-polishing step that limits the cost savings that can be achieved with spalling as a wafer reuse technique. In this study, we investigate facet suppression in spalling of (100) GaAs by redirecting the fracture front along features created by buried nanoimprint lithography (NIL)-patterned SiO 2 . We show successful facet suppression using patterns that result in favorable fracture along the SiO 2 /GaAs interface. The results from this work show NIL patterned interlayers are a promising method for faceting suppression in (100) GaAs spalling.
- Research Organization:
- National Renewable Energy Lab. (NREL), Golden, CO (United States)
- Sponsoring Organization:
- U.S. Department of Defense (DOD), Air Force Research Laboratory
- DOE Contract Number:
- AC36-08GO28308
- OSTI ID:
- 1823572
- Report Number(s):
- NREL/CP-5900-78993; MainId:32910; UUID:4273870d-cd69-4fb4-b58f-da7abb337bcc; MainAdminID:25661
- Resource Relation:
- Conference: Presented at the 2021 IEEE 48th Photovoltaic Specialists Conference (PVSC), 20-25 June 2021
- Country of Publication:
- United States
- Language:
- English
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