There is a growing interest in custom spatial accelerators for machine learning applications. These accelerators employ a spatial array of processing elements (PEs) interacting via custom buffer hierarchies and networks-on-chip. The efficiency of these accelerators comes from employing optimized dataflow (i.e., spatial/temporal partitioning of data across the PEs and fine-grained scheduling) strategies to optimize data reuse. The focus of this work is to evaluate these accelerator architectures using a tiled general matrix-matrix multiplication (GEMM) kernel. To do so, we develop a framework that finds optimized mappings (dataflow and tile sizes) for a tiled GEMM for a given spatial accelerator and workload combination, leveraging an analytical cost model for runtime and energy. Finally, our evaluations over five spatial accelerators demonstrate that the tiled GEMM mappings systematically generated by our framework achieve high performance on various GEMM workloads and accelerators.
Moon, Gordon Euhyun, et al. "Evaluating Spatial Accelerator Architectures with Tiled Matrix-Matrix Multiplication.." IEEE Transactions on Parallel and Distributed Systems, vol. 33, no. 4, Aug. 2021. https://doi.org/10.1109/TPDS.2021.3104240
Moon, Gordon Euhyun, Kwon, Hyoukjun, Jeong, Geonhwa, et al., "Evaluating Spatial Accelerator Architectures with Tiled Matrix-Matrix Multiplication.," IEEE Transactions on Parallel and Distributed Systems 33, no. 4 (2021), https://doi.org/10.1109/TPDS.2021.3104240
@article{osti_1820407,
author = {Moon, Gordon Euhyun and Kwon, Hyoukjun and Jeong, Geonhwa and Chatarasi, Prasanth and Rajamanickam, Sivasankaran and Krishna, Tushar},
title = {Evaluating Spatial Accelerator Architectures with Tiled Matrix-Matrix Multiplication.},
annote = {There is a growing interest in custom spatial accelerators for machine learning applications. These accelerators employ a spatial array of processing elements (PEs) interacting via custom buffer hierarchies and networks-on-chip. The efficiency of these accelerators comes from employing optimized dataflow (i.e., spatial/temporal partitioning of data across the PEs and fine-grained scheduling) strategies to optimize data reuse. The focus of this work is to evaluate these accelerator architectures using a tiled general matrix-matrix multiplication (GEMM) kernel. To do so, we develop a framework that finds optimized mappings (dataflow and tile sizes) for a tiled GEMM for a given spatial accelerator and workload combination, leveraging an analytical cost model for runtime and energy. Finally, our evaluations over five spatial accelerators demonstrate that the tiled GEMM mappings systematically generated by our framework achieve high performance on various GEMM workloads and accelerators.},
doi = {10.1109/TPDS.2021.3104240},
url = {https://www.osti.gov/biblio/1820407},
journal = {IEEE Transactions on Parallel and Distributed Systems},
issn = {ISSN 1045-9219},
number = {4},
volume = {33},
place = {United States},
publisher = {IEEE},
year = {2021},
month = {08}}
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