Integrated Circuit Design for Radiation-Hardened Charge-Sensitive Amplifier Survived up to 2 Mrad

Lee, Changyeop; Cho, Gyuseong; Unruh, Troy; Hur, Seop; Kwon, Inyong

doi:10.3390/s20102765

Integrated Circuit Design for Radiation-Hardened Charge-Sensitive Amplifier Survived up to 2 Mrad

Journal Article · Tue May 12 00:00:00 EDT 2020 · Sensors

DOI:https://doi.org/10.3390/s20102765· OSTI ID:1815494

Lee, Changyeop ^[1]; Cho, Gyuseong ^[2]; Unruh, Troy ^[3]; Hur, Seop ^[4]; Kwon, Inyong ^[4]

Korea Advanced Inst. Science and Technology (KAIST), Daejeon (Korea, Republic of). Dept. of Nuclear and Quantum Engineering; Korea Atomic Energy Research Inst., Daejeon (Korea, Republic of); OSTI
Korea Advanced Inst. Science and Technology (KAIST), Daejeon (Korea, Republic of). Dept. of Nuclear and Quantum Engineering
Idaho National Lab. (INL), Idaho Falls, ID (United States)
Korea Atomic Energy Research Inst., Daejeon (Korea, Republic of)

According to the continuous development of metal-oxide semiconductor (MOS) fabrication technology, transistors have naturally become more radiation-tolerant through steadily decreasing gate-oxide thickness, increasing the tunneling probability between gate-oxide and channel. Unfortunately, despite this radiation-hardened property of developed transistors, the field of nuclear power plants (NPPs) requires even higher radiation hardness levels. Particularly, total ionizing dose (TID) of approximately 1 Mrad could be required for readout circuitry under severe accident conditions with 100 Mrad around a reactor in-core required. In harsh radiating environments such as NPPs, sensors such as micro-pocket-fission detectors (MPFD) would be a promising technology to be operated for detecting neutrons in reactor cores. For those sensors, readout circuits should be fundamentally placed close to sensing devices for minimizing signal interferences and white noise. Therefore, radiation hardening ability is necessary for the circuits under high radiation environments. This paper presents various integrated circuit designs for a radiation hardened charge-sensitive amplifier (CSA) by using SiGe 130 nm and Si 180 nm fabrication processes with different channel widths and transistor types of complementary metal-oxide-semiconductor (CMOS) and bipolar CMOS (BiCMOS). These circuits were tested under γ–ray environment with Cobalt-60 of high level activity: 490 kCi. The experiment results indicate amplitude degradation of 2.85%–34.3%, fall time increase of 201–1730 ns, as well as a signal-to-noise ratio (SNR) of 0.07–11.6 dB decrease with irradiation dose increase. These results can provide design guidelines for radiation hardening operational amplifiers in terms of transistor sizes and structures.

View Accepted Manuscript (DOE)

Research Organization:: Idaho National Laboratory (INL), Idaho Falls, ID (United States)

Sponsoring Organization:: USDOE Office of Science (SC); National Research Foundation of Korea (NRF); Ministry of Science and ICT

Grant/Contract Number:: AC07-05ID14517

OSTI ID:: 1815494

Journal Information:: Sensors, Journal Name: Sensors Journal Issue: 10 Vol. 20; ISSN SENSC9; ISSN 1424-8220

Publisher:: MDPI AGCopyright Statement

Country of Publication:: United States

Language:: English

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Integrated Circuit Design for Radiation-Hardened Charge-Sensitive Amplifier Survived up to 2 Mrad

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