Nanoporous Dielectric Resistive Memories Using Sequential Infiltration Synthesis

Chakrabarti, Bhaswar; Chan, Henry; Alam, Khan; Koneru, Aditya; Gage, Thomas E.; Ocola, Leonidas E.; Divan, Ralu; Rosenmann, Daniel; Khanna, Abhishek; Grisafe, Benjamin; Sanders, Toby; Datta, Suman; Arslan, Ilke; Sankaranarayan, Subramanian S.; Guha, Supratik

doi:10.1021/acsnano.0c03201

Nanoporous Dielectric Resistive Memories Using Sequential Infiltration Synthesis

Journal Article · Mon Mar 01 00:00:00 EST 2021 · ACS Nano

DOI:https://doi.org/10.1021/acsnano.0c03201· OSTI ID:1810325

^[1]; ^[2]; Alam, Khan ^[1]; Koneru, Aditya ^[3]; Gage, Thomas E. ^[4]; Ocola, Leonidas E. ^[4]; Divan, Ralu ^[4]; Rosenmann, Daniel ^[4]; Khanna, Abhishek ^[5]; Grisafe, Benjamin ^[5]; Sanders, Toby ^[6]; Datta, Suman ^[5]; Arslan, Ilke ^[4]; Sankaranarayan, Subramanian S. ^[2]; ^[7]

Univ. of Chicago, IL (United States)
Argonne National Lab. (ANL), Argonne, IL (United States). Center for Nanoscale Materials; Univ. of Illinois, Chicago, IL (United States)
Univ. of Illinois, Chicago, IL (United States)
Argonne National Lab. (ANL), Argonne, IL (United States). Center for Nanoscale Materials
Univ. of Notre Dame, IN (United States)
Arizona State Univ., Tempe, AZ (United States)
Univ. of Chicago, IL (United States); Argonne National Lab. (ANL), Argonne, IL (United States). Center for Nanoscale Materials

Resistance switching in metal–insulator–metal structures has been extensively studied in recent years for use as synaptic elements for neuromorphic computing and as nonvolatile memory elements. However, high switching power requirements, device variabilities, and considerable trade-offs between low operating voltages, high on/off ratios, and low leakage have limited their utility. Here, we have addressed these issues by demonstrating the use of ultraporous dielectrics as a pathway for high-performance resistive memory devices. Using a modified atomic layer deposition based technique known as sequential infiltration synthesis, which was developed originally for improving polymer properties such as enhanced etch resistance of electron-beam resists and for the creation of films for filtration and oleophilic applications, we are able to create ~15 nm thick ultraporous (pore size ~5 nm) oxide dielectrics with up to 73% porosity as the medium for filament formation. We show, using the Ag/Al₂O₃ system, that the ultraporous films result in ultrahigh on/off ratio (>10⁹) at ultralow switching voltages (~±600 mV) that are 10× smaller than those for the bulk case. In addition, the devices demonstrate fast switching, pulsed endurance up to 1 million cycles. and high temperature (125 °C) retention up to 10⁴ s, making this approach highly promising for large-scale neuromorphic and memory applications. Additionally, this synthesis methodology provides a compatible, inexpensive route that is scalable and compatible with existing semiconductor nanofabrication methods and materials.

View Accepted Manuscript (DOE)

Research Organization:: Argonne National Laboratory (ANL), Argonne, IL (United States)

Sponsoring Organization:: National Science Foundation (NSF); Office of Naval Research; Semiconductor Research Corporation (SRC); US Department of the Navy, Office of Naval Research (ONR); USDOE Office of Science (SC), Basic Energy Sciences (BES). Scientific User Facilities Division

Grant/Contract Number:: AC02-06CH11357

OSTI ID:: 1810325

Alternate ID(s):: OSTI ID: 1819284

Journal Information:: ACS Nano, Journal Name: ACS Nano Journal Issue: 3 Vol. 15; ISSN 1936-0851

Publisher:: American Chemical Society (ACS)Copyright Statement

Country of Publication:: United States

Language:: English

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