Information Leakage Analysis using a Co-design-Based Fault Injection Technique on a RISC-V Microprocessor
- Univ. of New Mexico, Albuquerque, NM (United States)
- Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Univ. of New Mexico, Albuquerque, NM (United States)
- Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)
- US Dept. of Defense, Fort Meade, MD (United States). Information Assurance Research
The RISC-V instruction set architecture open licensing policy has spawned a hive of development activity, making a range of implementations publicly available. The environments in which RISC-V operates have expanded correspondingly, driving the need for a generalized approach to evaluating the reliability of RISC-V implementations under adverse operating conditions or after normal wear-out periods. Fault injection (FI) refers to the process of changing the state of registers or wires, either permanently or momentarily, and then observing execution behavior. The analysis provides insight into the development of countermeasures that protect against the leakage or corruption of sensitive information which might occur because of unexpected execution behavior. In this paper, we develop a hardware-software co-design architecture that enables fast, configurable fault emulation and utilize it for information leakage and data corruption analysis. Modern System-on-chip FPGAs enable building an evaluation platform where control elements run on a processor(s) (PS) simultaneously with the target design running in the programmable logic (PL). Software components of the FI system introduce faults and report execution behavior. A pair of RISC-V FI-instrumented implementations are created and configured to execute the Advanced Encryption Standard and Twister algorithms. Key and plaintext information leakage and degraded pseudo-random sequences are both observed in the output for a subset of the emulated faults.
- Research Organization:
- Sandia National Laboratories (SNL-NM), Albuquerque, NM (United States)
- Sponsoring Organization:
- USDOE National Nuclear Security Administration (NNSA)
- Grant/Contract Number:
- AC04-94AL85000; NA0003525
- OSTI ID:
- 1781546
- Report Number(s):
- SAND--2021-2696J; 694602
- Journal Information:
- IEEE Transations on Computer-Aided Design of Integrated Circuits and Systems, Journal Name: IEEE Transations on Computer-Aided Design of Integrated Circuits and Systems Journal Issue: 3 Vol. 41; ISSN 0278-0070
- Publisher:
- IEEECopyright Statement
- Country of Publication:
- United States
- Language:
- English
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