Tutorial on forming through-silicon vias
- Univ. of Alabama, Tuscaloosa, AL (United States)
- Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)
- Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Univ. of New Mexico, Albuquerque, NM (United States)
Through-silicon vias (TSVs) are a critical technology for three-dimensional integrated circuit technology. These through-substrate interconnects allow electronic devices to be stacked vertically for a broad range of applications and performance improvements such as increased bandwidth, reduced signal delay, improved power management, and smaller form-factors. There are many interdependent processing steps involved in the successful integration of TSVs. This article provides a tutorial style review of the following semiconductor fabrication process steps that are commonly used in forming TSVs: deep etching of silicon to form the via, thin film deposition to provide insulation, barrier, and seed layers, electroplating of copper for the conductive metal, and wafer thinning to reveal the TSVs. Recent work in copper electrochemical deposition is highlighted, analyzing the effect of accelerator and suppressor additives in the electrolyte to enable void-free bottom-up filling from a conformally lined seed metal.
- Research Organization:
- Sandia National Laboratories (SNL-NM), Albuquerque, NM (United States)
- Sponsoring Organization:
- USDOE National Nuclear Security Administration (NNSA); US Air Force Office of Scientific Research (AFOSR); National Science Foundation (NSF)
- Grant/Contract Number:
- AC04-94AL85000; NA0003525
- OSTI ID:
- 1697991
- Report Number(s):
- SAND--2020-0908J; 683167
- Journal Information:
- Journal of Vacuum Science and Technology A, Journal Name: Journal of Vacuum Science and Technology A Journal Issue: 3 Vol. 38; ISSN 0734-2101
- Publisher:
- American Vacuum Society / AIPCopyright Statement
- Country of Publication:
- United States
- Language:
- English
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